As device dimensions get smaller, and device density increases, it becomes more and more difficult to build an efficient and reliable isolation process to separate active devices. The limits of the standard LOCOS process have motivated the search for and the development of new isolation schemes, and trench isolation is a promising candidate as it uses a fully recessed oxide, has no birds beaks, is fully planar, and does not suffer from the field oxide thinning effect.
However, the trench isolation process still suffers from problems such as "corners" effects at the trench edge that can increase device leakage current, especially when the trench is recessed. This problem has been mentioned in a scientific paper entitled, "A New Three-Dimensional MOSFET Gate-Induced Drain Leakage Effect in Narrow Deep Submicron Devices," by Geissler, Porth, Lasky, Johnson and Voldman, and published in the 1991 IEEE IEDM Technical Digest in which it is described as a key problem of isolation trench technology. The present invention substantially eliminates this problem by creating a smooth trench profile with a self-aligned cap or dome.